Field
This disclosure relates generally to firmware memory management, and more specifically, to patching firmware used during program/erase and other high voltage operations of a flash memory.
Related Art
Semiconductor systems often include one or more processor cores with a variety of coupled memories. Typically, one of those memories is a flash that contains firmware used by the processor cores for operational configuration. Often reducing the size of the semiconductor system is important for particular applications in which the semiconductor system is to be included.
In low-cost, flash memory management operations, reducing the semiconductor area consumed by the flash memory can be important. One of the largest overheads in a flash memory management unit is a requirement for SCRAM memory for code execution, variables, and CPU stack during certain operations when the flash memory is inaccessible (e.g., program/erase high voltage operation). SCRAM memory area has typically been reduced using methods such as code optimization and paging schemes.
SCRAM can be replaced with an array of flip flops, but current SCRAM memory utilization schemes cannot reduce the needed SCRAM memory size to a point where an array of flip flops consumes less semiconductor area. Another alternative to SCRAM for storage of those commands needed during periods of flash inaccessibility is to utilize fixed firmware stored either in registers or read-only memory. A disadvantage of this memory area is that the code is permanently stored in those locations, thereby losing the flexibility provided by use of SCRAM space.
It is therefore desirable to store code used during flash memory inaccessible periods in a space-efficient manner, while at the same time providing flexibility to modify that code should the need arise, such as, for example, during firmware modification.
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